The present invention relates to the field of data processing devices including No Operation ("NOP") instructions. More particularly, the present invention relates to data processing devices that eliminate at least NOP instructions from an instruction string to provide more efficient use of instruction storage memory. The present invention also particularly relates to data processing devices, mainly intended for a Very Long Instruction Word ("VLIW") computer, that eliminate NOP instructions inserted substantially into a load module of the VLIW computer to compress the load module and expand the compressed load module automatically by a hardware circuit when executing instructions.
To satisfy the recent demand for faster computer systems, a computer based on a new Central Processing Unit ("CPU") operating system called VLIW is being developed. To install a VLIW-type computer in a limited memory space, VLIW-type load modules should be made as small as possible.
A load module of a conventional VLIW-type computer contains NOP instructions. Because of the use of many unnecessary NOP instructions, the percentage of actual execution instructions in a load module is low. Therefore, if a VLIW-type computer is introduced into a computing system that has a limited memory capacity, such as dedicated processing modules, instruction storage memory is not used efficiently.
Thus, as set forth above, the low efficiency of memory use makes it difficult to use a VLIW-type computer for industrial applications.